Computer Science 1.1

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Virtual memory

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40 Terms

1

Virtual memory

A process when the OS moves a page/segment from RAM into virtual memory when its likely not to be needed.

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2

Virtual RAM

If RAM is full OS creates more using secondary storage

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3

RAM (Random access memory)

Temporary memory that stores programs that are loaded. Limited so more RAM can increase performance.

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4

ROM (Read only memory)

Fast permanent storage. Stores the BIOS. Cannot be overwritten. Non volatile so power is not required to access ROM.

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5

Cocurrency

Multiple instructions can happen at the same time.

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6

Disadvantages of parallel processing

Only certain types of data are suitable for parallel processing.

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7

Advantages of parallel processing

More than one instruction is processed at one time making processing faster.

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8

Examples of MIMD

Used in supercomupters

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9

MIMD (Multiple instruction multiple data)

Multiple instructions are carried out on multiple data. Used in multi core processing.

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10

Example of SIMD

Mathematical problems such as weather forecasting

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11

SIMD (Single instruction multiple data)

A single instruction is carried out on multiple pieces of data at one time. This is used in array processor.

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12

Parallel processing

Approach when a computer carries out multiple computations simultaneously to solve a given problem.

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13

Disadvantages of RISC

More RAM space is required and compiler software has to work harder

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14

Advantages of RISC

Faster due to simple instructions and is also cheaper to make

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15

Use of RISC

Used on many portable devices

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16

RISC (Reduced instruction set computer)

Contains fewer and simple instruction sets. Has a simple architecture

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17

Compiler

Looks at commands and translates to binary

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18

Disadvantages of CISC

Programs can run slower due to complex instructions

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19

Advantages of CISC

Complex instructions and lots of addressing modes

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20

Use of CISC

Used to make compiler development easier

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21

CISC (Complex instruction set computer)

Complex and larger set of instructions. Has a single register set

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22

Harvard Architecture

Has physically seperate memories for instructions and data. Has seperate data buses.

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23

Pipelining Flush

A proccess enacted by CPU when it cannot ensure it will correctly proccess its instruction in the next clock cycle

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24

Disadvantage of Pipelining

Only possible if the program counter knows the next instruction to be fetched

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25

Advantage of Pipelining

Improves performance

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26

Pipelining

Is a process of completing FDE cycles of three separate instructions simultaneously

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27

Polling

when the OS will constantly check if any peripherals needs it's attention

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28

Control bus

Sends control signals from the control unit to other parts of the processor. It synchronises commands of the processor.

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29

Data bus

Carries data being transmitted between areas of the processor.

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30

Address bus

Carries address to which the instruction/data is being transmitted.

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31

Bus

A set of parallel wires connecting two or more components of a computer. They consist of 8,16,32 or 64 lines.

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32

Current Instruction Register (CIR)

Holds the current instruction that is being executed.

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33

Memory Data Register (MDR)

Temporarily stores data that has been read or data that needs to be written.

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34

Memory Address Register (MAR)

Holds the address in memory of the data to be fetched and stored. Specifies the location where data is read from or written to.

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35

Accumulator register (ACC)

Temporarily stores data during processing and is involved in calculations.

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36

Program counter register (PC)

Indicates the address of the next instruction to be executed.

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37

Register

Special memory cells that operate at very high speeds. They are memory stores inside the CPU that store data.

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38

Arithmetic Logic Unit (ALU)

Completes all of the arithmetic and logic operations. It performs mathematical operations

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39

Controll Unit

Manages and coordinates all of the CPU activity. It directs flow of data between the CPU and other devices. It manages execution of instructions

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40

System clock speed

Generates a series of signals which regulates the operations of the CPU when its performing the FDE cycle

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